Working on a Start-Up: A Case for An Applied Entrepreneurship Oriented Course for Senior Undergraduates

In this paper, we describe a new teaching approach whose objective is to implement entrepreneurship-based learning. The proposed teaching approach is essentially a project-based approach, but, with two novel key components that give it the entrepreneurship emphasis. First, the main idea is to divide students into groups of four or five members and have each team go through the process of starting-up a company. This process tries to emulate all steps through which entrepreneurs go when a new start-up idea is taken from concept to product realization. These steps include proposing a novel start-up idea, writing a business plan, coming up with a solution, implementing and testing the solution, and reporting results. The only constraint of this “exercise” is that all start-up ideas must be related to the main topic of the course, which in our case is that of advanced hardware description language and field-programmable gate array (FPGA) digital design. As a second component, each student is required to maintain a so called individual reflective journal (IRJ). Students add new entries of about half a page each week to the IRJ, which plays the role of a diary. The objective of this component is to engage students in thinking about how the course activities tie into the three components of the KEEN framework: curiosity, connections, and creation of value. The projected outcomes of this teaching approach include: 1) help students to develop an entrepreneurial mindset, 2) foster creativity and self-learning, and 3) engage students more and enable them to be proactive and competition-aware

Optimization of patch antennas via multithreaded simulated annealing based design exploration

In this paper, we present a new software framework for the optimization of the design of microstrip patch antennas. The proposed simulation and optimization framework implements a simulated annealing algorithm to perform design space exploration in order to identify the optimal patch antenna design. During each iteration of the optimization loop, we employ the popular MEEP simulation tool to evaluate explored design solutions. To speed up the design space exploration, the software framework is developed to run multiple MEEP simulations concurrently. This is achieved using multithreading to implement a manager-workers execution strategy. The number of worker threads is the same as the number of cores of the computer that is utilized. Thus, the computational runtime of the proposed software framework enables effective design space exploration. Simulations demonstrate the effectiveness of the proposed software framework

Dynamic Energy Management for Chip Multi-processors under Performance Constraints

We introduce a novel algorithm for dynamic energy management (DEM) under performance constraints in chip multi-processors (CMPs). Using the novel concept of delayed instructions count, performance loss estimations are calculated at the end of each control period for each core. In addition, a Kalman filtering based approach is employed to predict workload in the next control period for which voltage-frequency pairs must be selected. This selection is done with a novel dynamic voltage and frequency scaling (DVFS) algorithm whose objective is to reduce energy consumption but without degrading performance beyond the user set threshold. Using our customized Sniper based CMP system simulation framework, we demonstrate the effectiveness of the proposed algorithm for a variety of benchmarks for 16 core and 64 core network-on-chip based CMP architectures. Simulation results show consistent energy savings across the board. We present our work as an investigation of the tradeoff between the achievable energy reduction via DVFS when predictions are done using the effective Kalman filter for different performance penalty thresholds

A Survey of Prediction and Classification Techniques in Multicore Processor Systems

In multicore processor systems, being able to accurately predict the future provides new optimization opportunities, which otherwise could not be exploited. For example, an oracle able to predict a certain application\u27s behavior running on a smart phone could direct the power manager to switch to appropriate dynamic voltage and frequency scaling modes that would guarantee minimum levels of desired performance while saving energy consumption and thereby prolonging battery life. Using predictions enables systems to become proactive rather than continue to operate in a reactive manner. This prediction-based proactive approach has become increasingly popular in the design and optimization of integrated circuits and of multicore processor systems. Prediction transforms from simple forecasting to sophisticated machine learning based prediction and classification that learns from existing data, employs data mining, and predicts future behavior. This can be exploited by novel optimization techniques that can span across all layers of the computing stack. In this survey paper, we present a discussion of the most popular techniques on prediction and classification in the general context of computing systems with emphasis on multicore processors. The paper is far from comprehensive, but, it will help the reader interested in employing prediction in optimization of multicore processor systems

Investigation of LSTM Based Prediction for Dynamic Energy Management in Chip Multiprocessors

In this paper, we investigate the effectiveness of using long short-term memory (LSTM) instead of Kalman filtering to do prediction for the purpose of constructing dynamic energy management (DEM) algorithms in chip multi-processors (CMPs). Either of the two prediction methods is employed to estimate the workload in the next control period for each of the processor cores. These estimates are then used to select voltage-frequency (VF) pairs for each core of the CMP during the next control period as part of a dynamic voltage and frequency scaling (DVFS) technique. The objective of the DVFS technique is to reduce energy consumption under performance constraints that are set by the user. We conduct our investigation using a custom Sniper system simulation framework. Simulation results for 16 and 64 core network-on-chip based CMP architectures and using several benchmarks demonstrate that the LSTM is slightly better than Kalman filtering

Investigation of LSTM Based Prediction for Dynamic Energy Management in Chip Multiprocessors

In this paper, we investigate the effectiveness of using long short-term memory (LSTM) instead of Kalman filtering to do prediction for the purpose of constructing dynamic energy management (DEM) algorithms in chip multi-processors (CMPs). Either of the two prediction methods is employed to estimate the workload in the next control period for each of the processor cores. These estimates are then used to select voltage-frequency (VF) pairs for each core of the CMP during the next control period as part of a dynamic voltage and frequency scaling (DVFS) technique. The objective of the DVFS technique is to reduce energy consumption under performance constraints that are set by the user. We conduct our investigation using a custom Sniper system simulation framework. Simulation results for 16 and 64 core network-on-chip based CMP architectures and using several benchmarks demonstrate that the LSTM is slightly better than Kalman filtering

Load Balancing with Energy Storage Systems Based on Co-Simulation of Multiple Smart Buildings and Distribution Networks

In this paper, we present a co-simulation framework that combines two main simulation tools, one that provides detailed multiple building energy simulation ability with Energy-Plus being the core engine, and the other one that is a distribution level simulator, Matpower. Such a framework can be used to develop and study district level optimization techniques that exploit the interaction between a smart electric grid and buildings as well as the interaction between buildings themselves to achieve energy and cost savings and better energy management beyond what one can achieve through techniques applied at the building level only. We propose a heuristic algorithm to do load balancing in distribution networks affected by service restoration activities. Balancing is achieved through the use of utility directed usage of battery energy storage systems (BESS). This is achieved through demand response (DR) type signals that the utility communicates to individual buildings. We report simulation results on two test cases constructed with a 9-bus distribution network and a 57-bus distribution network, respectively. We apply the proposed balancing heuristic and show how energy storage systems can be used for temporary relief of impacted networks

An Efficient and Cost Effective FPGA Based Implementation of the Viola-Jones Face Detection Algorithm

We present an field programmable gate arrays (FPGA) based implementation of the popular Viola-Jones face detection algorithm, which is an essential building block in many applications such as video surveillance and tracking. Our implementation is a complete system level hardware design described in a hardware description language and validated on the affordable DE2-115 evaluation board. Our primary objective is to study the achievable performance with a low-end FPGA chip based implementation. In addition, we release to the public domain the entire project. We hope that this will enable other researchers to easily replicate and compare their results to ours and that it will encourage and facilitate further research and educational ideas in the areas of image processing, computer vision, and advanced digital design and FPGA prototyping

Hybrid Field Oriented and Direct Torque Control for Sensorless BLDC Motors Used in Aerial Drones

In this study, a sensorless hybrid control scheme for brushless direct current (BLDC) motors for use in multirotor aerial vehicles is introduced. In such applications, the control scheme must satisfy high-performance demands for a wide range of rotor speeds and must be robust to motor parameter uncertainties and measurement noise. The proposed controller combines field-oriented control (FOC) and direct torque control (DTC) techniques to take benefit of the advantages offered by each of these techniques individually. Simulation results demonstrate the effectiveness of the proposed control scheme over a wide range of rotor speeds as well as good robustness against parameter uncertainties within -5to + 10% for inductance and -5to + 5% for resistance parameters. The proposed hybrid controller is robust also against noise in voltage and current measurements. In order to verify the results from simulation, the proposed hybrid controller is implemented in hardware using the TI C2000 Piccolo Launchpad and TI BOOSTXL-DRV8305EVM BoosterPack. Testing is done with a Bull Running motor typically used in aerial drones. Testing experiments demonstrate that the hybrid controller reduces the rotor speed ripple when compared to DTC while operating in steady-state mode and decreases the response time to desired speed changes when compared to FOC